Alif Semiconductor /AE302F40C1537LE_CM55_HE_View /GPU2D /GPU2D_DLISTSTART

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Interpret as GPU2D_DLISTSTART

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DLISTSTART

Description

Display List Start Address Register

Fields

DLISTSTART

Display list start address Setting a new display list base address triggers execution of the new display list. Note that once the display list is started, the display list reader is the master for all register writes to the core. No register write must be done via the slave bus as long as the display list execution is ongoing. Otherwise, commands from the display list may be lost and rendering artifacts as well as core hangups can occur.

Links

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